A 3D electronic module comprises a stack of electronic wafers, interconnected in three dimensions by using the faces of the stack to make the connections between the wafers. A wafer 5, one example of which is represented in FIG. 1, normally comprises one or more active components 1b or passive components 1a which have electrical connection elements 2b or 2a, the components being coated in an electrically insulating resin 6. The connection elements 2a or 2b of the components are linked to connection terminals supported by an electrically insulating substrate 4. One or more electrically conductive tracks 3 supported by the insulating substrate 4 interlink these components or interlink electrical connection elements of the wafers. The wafers are electrically interlinked by conductors located on the lateral faces of the stack, that is, on the edges 7 of the wafers.
There are several methods for connecting the terminals of the component to those of the substrate.
One method involves directly connecting the terminals of the component to those of the insulating substrate by sending ultrasounds. The energy sent is proportional to the number of terminals to be connected. For components with a large number of terminals, the energy needed for the connection sometimes causes the component to break. One solution for reducing this energy involves heating the substrate which is then softened and absorbs a portion of the ultrasound energy sent which renders the connection very difficult. Furthermore, when the components are coated by polymerization performed at approximately 150°, the substrate tends to bend because the expansion coefficient of the components differs from that of the substrate, typically four times less.